At this year’s International Solid State Circuits Conference, Intel released more information on its new ultra low power 45nm processor dubbed “Silverthorne”.
It will be a 16-stage single core part built on IA architecture and a the same time, it will remain compatible with the Core 2 design. It uses an in-order pipeline but compensates for this by also reintroducing hyper-threading.
Intel claims the CPU will have a
“10x lower power than the ULV Dothan” – Dothan was the 90nm, 2MB L2 cache single core Penium-M. The chip also uses 6T (transistor) bit cells, up from the normal four in SRAM, highlighting it as being
“optimised (for) register-file and cache (access)”. Silverthorne features deeper sleep states than we've seen with Penryn and a split IO power supply making it use under 1W total in some configurations—even under load.
The in-order architecture is a step-backwards in many respects – the out of order (OoO) design inception with the Pentium Pro was a landmark performance increase for Intel, and it’s only recently that VIA’s latest Isaiah CPU has also implemented it, claiming similar fantastic performance increases. Previous VIA C-series CPUs have been categorised as being woefully underpowered, so will Silverthorne suffer the same fate?
Silverthorne, like VIA's C7, is predominantly made for MID (mobile internet devises) as part of the Menlow platform
we originally saw in IDF last Spring. Expect to see more handheld products released, but given almost complete neglect for this market segment and the current trend for small and very inexpensive notebooks – EeePC clones might end up using this small platform instead.
That is, providing it has the cost and necessary performance when it arrives. On the topic of small, low power and inexpensive: there was no word on the new
Diamondvile CPU and Shelton platform though – the new low cost platform is meant to replace the low power Celeron featured in the Asus EeePC.
On the other hand, Tukwila is at the other end of the scale – Intel’s new super-massive two
BILLION transistor Itanium chip. It features 30MB on-die cache, integrates two memory controllers and is a native quad-core part with “don’t call me Hyper-Threading” Multi-Threading supporting up to eight threads. It’s also the first Intel processor to feature QuickPath interconnects, for which it has five, instead of a front side bus.
The CPU is built on Intel’s very mature 65nm process and claims “Energy Efficiency” by providing roughly twice the performance of the previous generation (Montvale) at 25 percent more power use – now making it a 130W part.
Big, small? Will either be any good? Let us know your thoughts,
in the forums.
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