Intel silently revises Core 2 Duo

Written by Brett Thomas

December 19, 2006 | 19:46

Tags: #allendale #brisbane #c2d #core-2-duo

Companies: #intel

For everyone who has been looking at a new Allendale core version of Intel's Core 2 Duo chips, here's a new reason to check your box. Apparently, the E6300 and E6400 chips have been given a little makeover without telling anyone - idle power is down considerably.

The new chips are evidently Intel's (albeit quiet) answer to AMD's latest engineering marvel, the Brisbane core. Brisbane consumption goes down to as low as 7 watts at idle, making low-usage CPU cooling easier and cheaper than most other components in the entire case. Its maximum output escalates up to 65W, so that's a pretty large spread!

However, Intel's Allendale cores (the 2MB cache section of the Core 2 Duo lineup) consumed a whopping 22W at idle, just like its 4MB cache big brothers. This is because Allendale is actually a Conroe core, just with 2MB of its cache disabled.

The new revision has lowered this 22W down to around 12W, cutting power consumption nearly in half for someone who leaves his computer on 24/7 (and thus is in full load states only a fraction of the time compared to when the computer is idle). One could possibly attribute this to Intel finally cutting power to the disabled section of cache, thus reducing the chip's total consumption.

Power management is growing to be a greater and greater concern, as many corporations don't shut down their machines nightly. In fact, many of us don't, either. The amount of electricity saved running even a few of these systems nonstop will definitely help ease the bottom line of your bill.

If you're curious to determine whether the one you're buying is a new revision or not, I'm afraid you'll need the box. The new version is dubbed "LP2" and is labeled with product code SL9TA instead of SL9SA. You can also look at the CPU ID - current Allendales end in 6F6, whereas LP2 versions are 6F2. The 4MB cache Conroe (E6600 and up) and quad-core Kentsfield cores are not affected in this revision.

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