Fiscally troubled chip maker AMD has been hit with a lawsuit claiming it misled buyers over the number of physical cores in its Bulldozer processors, arguing that its paired cores with shared floating-point unit design does not constitute an proper multi-core design.
AMD's Bulldozer and newer chip designs features a modular architecture: pairs of integer cores are bundled together and both connected to a single, shared floating-point unit which is capable of either a single 128-bit instruction or of combining with the second FPU on the die for a 256-bit operation, along with some shared instruction and execution hardware. Shared hardware in multi-processor systems isn't anything new, of course, but a lawsuit filed in late October claims that AMD's design deliberately misleads customers into believing the parts have twice the number of genuine independent cores as is actually the case.
In the filing, first spotted by newswire service Legal Newsline, Tom Dickey argues that AMD's claims that its top-end Bulldozer parts had eight physical cores is untrue, and that four cores is a more honest number. To support his claim, Dickey points to the paired-core and shared-FPU architecture: using this design, he argues, it's impossible for the processor to work on eight independent threads simultaneously - unlike an eight-core part from rival Intel - and therefore cannot be described as an eight-core processor.
It's an argument which appears to rest wholly on the presence of only four FPU cores on the eight-core chip, but one which Dickey may struggle to win: floating-point units have not always been integral to processor designs, with early processors being integer-only models which emulated floating-point mathematics internally and the first FPUs themselves being entirely separate chips used as a co-processor, so to argue that the core-count of a chip is tied directly to the number of FPU units present is an interesting tactic - doubly so when it is entirely possible for the processor in question to run eight integer-based threads simultaneously.
Dickey is seeking class action status for his suit, and arguing for statutory and punitive damages against AMD that could add up to the millions. At the same time, AMD is gearing up to launch its Zen architecture with the promise of a significant boost in instructions per clock (IPC) over its last few microarchitectures.
AMD has not issued a comment on the case, which is being argued under the California Consumer Legal Remedies Act and Unfair Competition Law.
UPDATE 2015-11-10
AMD has issued a short formal statement on the lawsuit. 'We believe our marketing accurately reflects the capabilities of the “Bulldozer” architecture which, when implemented in an 8 core AMD FX processor is capable of running 8 instructions concurrently,' a spokesperson explained.
AMD's Bulldozer and newer chip designs features a modular architecture: pairs of integer cores are bundled together and both connected to a single, shared floating-point unit which is capable of either a single 128-bit instruction or of combining with the second FPU on the die for a 256-bit operation, along with some shared instruction and execution hardware. Shared hardware in multi-processor systems isn't anything new, of course, but a lawsuit filed in late October claims that AMD's design deliberately misleads customers into believing the parts have twice the number of genuine independent cores as is actually the case.
In the filing, first spotted by newswire service Legal Newsline, Tom Dickey argues that AMD's claims that its top-end Bulldozer parts had eight physical cores is untrue, and that four cores is a more honest number. To support his claim, Dickey points to the paired-core and shared-FPU architecture: using this design, he argues, it's impossible for the processor to work on eight independent threads simultaneously - unlike an eight-core part from rival Intel - and therefore cannot be described as an eight-core processor.
It's an argument which appears to rest wholly on the presence of only four FPU cores on the eight-core chip, but one which Dickey may struggle to win: floating-point units have not always been integral to processor designs, with early processors being integer-only models which emulated floating-point mathematics internally and the first FPUs themselves being entirely separate chips used as a co-processor, so to argue that the core-count of a chip is tied directly to the number of FPU units present is an interesting tactic - doubly so when it is entirely possible for the processor in question to run eight integer-based threads simultaneously.
Dickey is seeking class action status for his suit, and arguing for statutory and punitive damages against AMD that could add up to the millions. At the same time, AMD is gearing up to launch its Zen architecture with the promise of a significant boost in instructions per clock (IPC) over its last few microarchitectures.
AMD has not issued a comment on the case, which is being argued under the California Consumer Legal Remedies Act and Unfair Competition Law.
UPDATE 2015-11-10
AMD has issued a short formal statement on the lawsuit. 'We believe our marketing accurately reflects the capabilities of the “Bulldozer” architecture which, when implemented in an 8 core AMD FX processor is capable of running 8 instructions concurrently,' a spokesperson explained.
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