IBM claims to have created the world's most powerful microprocessor, a hexa-core design running at 5.5GHz and found at the heart of its new zEnterprice EC12 high-performance mainframe system.
An application-tuned out-of-order superscalar chip, the unnamed zEC12 processor includes some serious technology beyond its eyebrow-raising stock clock speed. Perhaps its biggest improvement over IBM's previous processors - and those from competing companies - is support for transactional execution, a system which treats system resources in a similar manner to a transactional database system to eliminate the overhead of software locking systems.
Although this requires software support - with IBM declaring that it will be adding support for the transactional execution facility of the new chip in an upcoming update to its Java runtime environment - it promises to seriously improve the efficiency of many-core systems. With the top-end zEC12 system packing a whopping 120 cores, that's something which is key to keeping things ticking over.
While IBM's zEC12 chip's transactional execution support makes the server the first general-purpose enterprise-scale system to include such a feature, similar technology is being adopted elsewhere. Intel's upcoming Haswell processor family, for example, will include Transaction Synchronisation Extensions (TSX) for much the same reason.
The zEC12 processor also includes an Enhanced-DAT2 facility, allowing languages to exploit 2GB page frames for more efficient use of vast quantities of memory, along with a decimal-to-floating point zoned conversion facility which will be supported in IBM's next PL/I compiler release.
Outside the processor, the zEC12 includes support for Flash Express memory. Designed for systems where bursts of activity are expected - such as a banking or retail system, where certain times of day result in a massive increase in demand - Flash Express memory is claimed to improve availability compared to traditional memory systems. Finally, the zEC12 is also the first of IBM's high-end mainframes to support operation without a raised floor, thanks to a new overhead power and cabling layout system.
While likely out of the reach of most of our readers - with pricing being very much only on formal application - IBM's zEC12 is nevertheless important: with support for transactional memory, it's validation for Intel's decision to add the same technology to Haswell - and suggests that software support will be forthcoming, initially for server applications but later for client software too.
It also gives chipmakers a new target for which to aim - and we're expecting both Intel and AMD to do their damndest to release 5.5GHz parts of their own for the high-performance computing markets - and what starts in the HPC and supercomputer markets trickles down to the data centre and, inevitably, to the desktop, meaning faster chips for all.
An application-tuned out-of-order superscalar chip, the unnamed zEC12 processor includes some serious technology beyond its eyebrow-raising stock clock speed. Perhaps its biggest improvement over IBM's previous processors - and those from competing companies - is support for transactional execution, a system which treats system resources in a similar manner to a transactional database system to eliminate the overhead of software locking systems.
Although this requires software support - with IBM declaring that it will be adding support for the transactional execution facility of the new chip in an upcoming update to its Java runtime environment - it promises to seriously improve the efficiency of many-core systems. With the top-end zEC12 system packing a whopping 120 cores, that's something which is key to keeping things ticking over.
While IBM's zEC12 chip's transactional execution support makes the server the first general-purpose enterprise-scale system to include such a feature, similar technology is being adopted elsewhere. Intel's upcoming Haswell processor family, for example, will include Transaction Synchronisation Extensions (TSX) for much the same reason.
The zEC12 processor also includes an Enhanced-DAT2 facility, allowing languages to exploit 2GB page frames for more efficient use of vast quantities of memory, along with a decimal-to-floating point zoned conversion facility which will be supported in IBM's next PL/I compiler release.
Outside the processor, the zEC12 includes support for Flash Express memory. Designed for systems where bursts of activity are expected - such as a banking or retail system, where certain times of day result in a massive increase in demand - Flash Express memory is claimed to improve availability compared to traditional memory systems. Finally, the zEC12 is also the first of IBM's high-end mainframes to support operation without a raised floor, thanks to a new overhead power and cabling layout system.
While likely out of the reach of most of our readers - with pricing being very much only on formal application - IBM's zEC12 is nevertheless important: with support for transactional memory, it's validation for Intel's decision to add the same technology to Haswell - and suggests that software support will be forthcoming, initially for server applications but later for client software too.
It also gives chipmakers a new target for which to aim - and we're expecting both Intel and AMD to do their damndest to release 5.5GHz parts of their own for the high-performance computing markets - and what starts in the HPC and supercomputer markets trickles down to the data centre and, inevitably, to the desktop, meaning faster chips for all.
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