Intel's Sunil Shenoy joins RISC-V start-up SiFive

January 23, 2018 | 10:47

Tags: #naveed-sherwani #open-hardware #processor #risc-v #semiconductor #sunil-shenoy

Companies: #intel #risc-v-foundation #sifive

Processor start-up SiFive, which builds chips and intellectual property (IP) designs based on the open RISC-V architecture, has announced that former Intel vice president Sunil Shenoy is now in charge of its hardware engineering division.

Since joining Intel's enterprise microprocessor group in 2006 as its general manager, computer engineer Sunil Shenoy had his finger in multiple pies: As well as leading the Nehalem family of products and putting the company on the path of its tick-tock development cadence - a manufacturing node improvement followed by a microarchitectural improvement, since abandoned due to the difficulties the company has faced in the move to 10nm and below - Shenoy was responsible for the development of Intel's HD Graphics and Xeon Phi parallel processor. Having left the company in 2014, Shenoy has been working as a consultant to the industry until announcing his employment as vice president for hardware engineering at SiFive this week.

'SiFive is leading the disruption of the semiconductor industry with effective implementation of the RISC-V instruction set architecture,' claims Shenoy of his new employer. 'I'm thrilled to be a part of this revolution, leading the charge on a new architecture and changing the way the industry does hardware design.'

'We're excited to bring in Sunil to help SiFive support the growth of RISC-V and meet rising demands of the industry,' adds Naveed Sherwani, SiFive's chief executive. 'His experience in leading large processor design teams that generated multiple market-leading products will help us advance SiFive's Core IP and processors for expanding market segments, and expand our position in the marketplace.'

At SiFive, Shenoy will be working on products based around the RISC-V instruction set architecture. Unlike the x86 ISA, RISC-V is designed to be open: Originally developed at the University of California at Berkeley, RISC-V is made available under the permissive BSD licence for anyone to take, build, or redesign for any purpose including for commercial release. Available in 32-bit, 64-bit, and 128-bit variants, the RISC-V ISA has found its way into projects ranging from replacements for proprietary Arm-based microcontrollers all the way up to many-core processors for high-performance computing (HPC) - though, SiFive's Linux-compatible designs aside, few are yet available commercially.

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