Esperanto pulls $58m for RISC-V many-core accelerators

Fabless chip designer Esperanto Technologies, claimed by its president and chief executive to be 'still operating largely in stealth mode', has announced a Series B funding round of $58 million to further its efforts in bringing the open RISC-V instruction set architecture (ISA) to machine learning applications.

First developed back in 2010 at the University of California, Berkeley, RISC-V is a reduced instruction set computing (RISC) instruction set architecture (ISA) designed as competition for everything from Arm in the embedded space to x86 in mainstream and high-performance computing. As well as the benefit of having little legacy cruft yet gathered, the main feature of RISC-V is that it is wholly open: As well as buying chips and intellectual property (IP) off the shelf, users can obtain the design files for the chips and produce them in-house either as direct copies or modified for specific use-cases, all without ever having to pay a single licensing or royalty fee.

It's a promise that has attracted many: Western Digital has begun transitioning its storage processing products to RISC-V, as has Nvidia for the logic processors in its graphics processing products; Rambus has released RISC-V based security chips; and two enterprise-oriented storage companies have released RISC-V-powered SSDs. SiFive, founded by some of RISC-V's creators and early influencers, has even attracted both talent and investment from rival Intel, while embedded processor giant Arm has responded with an ill-judged aggressive smear campaign and 'free' Cortex cores.

Now, in further evidence that RISC-V is making a splash, Esperanto Technologies has closed its Series B funding round with $58 million - a massive increase from the $5 million the company had previously raised. 'Despite still operating largely in stealth mode, we appreciate this strong show of support from strategic and VC [venture capital] investors who had confidential briefings about our plans and believe we have a compelling solution for accelerating ML [machine learning] applications,' claims president and chief executive Dave Ditzel, co-author of noted white-paper The Case for RISC and founder and former chief executive of low-power-computing specialist Transmeta, of the funding. 'Esperanto has assembled one of the most experienced VLSI [very large scale integration] product engineering teams in the ML industry, and we believe that will be a differentiating factor as we drive toward our 7nm products.'

The funds, the company claims, will be used to speed development of RISC-V based ET-Minion processors for machine learning, artificial intelligence, and deep learning acceleration, on a 7nm process node. Each chip built at this process size will include, Esperanto promises, more than a thousand physical 64-bit RISC-V cores, designed to considerably accelerate AI and related workloads at a very low power draw.

The company has not yet indicated a time-to-market for its parts, however.